Glob top materials to chip on board components

TWI, Abington, Cambridge CB1 6AL, UK

Presented at ICAWT '98, The 1998 International Conference on Advances in Welding Technology - 'Joining applications in electronics and medical devices', Columbus, Ohio, USA, 30 September - 2 October 1998.

Abstract

Glob-top resins are providing a low cost packaging solution for chip on board technology. Although initially used for non-critical applications, they are becoming more widely spread in products where reliability is an issue (e.g. industrial and telecommunications applications). The attractiveness of COB (board space and height savings) has driven improvements in both resin materials and processing methods.

This paper reviews the current state of glob-top materials, highlighting recent developments, and then addresses an evaluation programme to independently assess various commercial materials.

Keywords

Electronics packaging, chip on board, glob-top resins, polymer encapsulation.

Introduction

The use of a layer of organic resin, or 'glob-top', to protect semiconductor devices first arose in the mid 1960s in an attempt to reduce the cost of manufacturing discrete transistors, which hitherto had been produced in hermetic packages. The potentially lower manufacturing cost of glob-top techniques, compared to conventional plastic moulded packages became attractive to video game cartridge manufacturers in the late 1970s when, at that time, component reliability was not considered to be a priority. Over recent years, the quality of glob top resins has steadily improved ^[1] and they are now in widespread use in consumer, industrial and telecommunication products, especially those in which the benefits of reduced circuit board space requirements, reduced component height and potential cost savings over packaged components, can be utilised. Multichip modules (MCMs), having a very high ratio of active component area to total substrate area (up to 85%) can benefit considerably. The saving in polymer board (or ceramic, silicon, or metal substrate) area by having a chip mounted and interconnected directly to it, i.e. chip on board (COB), over a conventional packaged device, can be as high as 50-80% ^[2,3,4,5], since the area of the package occupied by the chip is relatively small, and the area taken up by the package sidewall and lead frame is often considerable. Smaller, but significant, savings in component height can also be achieved since the base of the chip is directly bonded to the board or substrate. Smart cards have become a reality, in the last few years, primarily due to the overall package height reduction afforded by COB technology ^[6].

Cost savings due to the elimination of the package can arise, but naked die for COB assembly are not always available at an attractive price, since many silicon vendors prefer to package and, subsequently, test their products (thus adding value) in-house. For this reason, and the fact that the naked chips cannot be conveniently fully tested, or subjected to a burn-in operation to screen out potentially faulty units, COB technology is not yet as widespread as conventional solder surface mount component technology (SMT).

Overview of current production/development glob-top materials and their properties

Organic resins are generally divided into two main groups: thermosetting and thermoplastic resins ^[7]. In the former case, the action of heat or a catalyst (or both) causes the constituent molecules to crosslink, forming a rigid fixed, thermoset structure. This structure cannot revert back to its original form by the action of re-heating and cooling. Increasing heat will cause the crosslinks to break and the material to degrade. In contrast, a thermoplastic material can be continually softened by the application of heat and returned to its rigid state by cooling. It is thus unsurprising that their mechanical properties are temperature sensitive to a high degree and their application is limited to low mechanical loadings due to their tendency to creep ^[8]. As with organic adhesive resins, glob-top materials may contain a mixture of thermoplastic and thermoset components.

Typical thermoset glob-top materials are based on epoxy resins whereas thermoplastic materials are based on polyimide or acrylate resins. Silicone based glob-top materials can fall into either category whilst some epoxy materials are modified by the inclusion of a thermoplastic component.

It has been seen that, out of the extremely large number of potential organic resins, only a relatively few are used as die encapsulants. The reason for this is connected with the relatively demanding range of properties that are required of encapsulation materials. The resin materials in common use as die encapsulants (all forms of moulded/COB construction) are represented by only the (albeit very large) epoxy, silicone and polyimide families ^[9,10,11,12]. Phenolic resins, used widely in the past for moulded plastic devices, have now been almost totally replaced by epoxies because of the high concentration of potentially corrosive ionic species associated with these materials.

The range of industry standard epoxy-based epoxy glob-top materials are conventionally syringe dispensed due to their rheological characteristics. Recently, stencil printable epoxy resins have become available from the UK ^[13] and Japan.

A series of acrylate resin encapsulants, with potential for use in glob-topped components, has been under development by one supplier, but, is unlikely to be made commercially available for some considerable time ^[14]. One particularly attractive property of these materials, from the processing viewpoint, is their ability to be cured by means of a relatively short (typically 30-60 seconds) exposure to blue light. One supplier of encapsulants in the USA, has recently developed a range of epoxy resins that are UV light curable ^[15].

Overview of failure mechanisms in silicon semiconductor devices

Defective semiconductor components are generally categorised as either chip or package/environment related failures. It is not the purpose of this paper to discuss inherent failure mechanisms related to semiconductor chips in detail, since it is the failures directly attributable to non-hermetic packaging (i.e. resin protection) that are the main area of interest.

The principal failure mechanisms related to the effects of device packaging and operating environments can be divided into four main groups, i.e.:

• mechanical stress induced failures
• moisture induced failures
• metallurgical factors
• environmental factors

Mechanical stress induced failures

The effect of mechanical stress on a glob topped device is complex ^[16], as several potentially damaging phenomena can occur. These include:

• chip cracking
• failure of chip to board or substrate joint
• damage to protective chip passivation layer
• wirebond failure (bond failures and wire failures)
• metallisation pattern shift
• development of voids or notches in metallisation tracks

In the case of extreme mechanical stresses being applied to the component, one or more of the above effects, illustrated in Fig.1, may cause either instantaneous or delayed component failure. Lesser mechanical stresses, arising from the many limited thermal excursions seen by the product, have a different effect. In this case, failures are likely to be due to a creep-fatigue mechanism ^[17]. A typical glob-topped component (Fig.2) comprises several materials, often having widely different thermal coefficients of linear expansion (TCEs). The effect of either heating or cooling the device is to alter the stress distributions in the component and, if the TCE disparities or temperature excursions are of sufficient magnitude, there is an increasing likelihood of damage.

In the cases of die cracking, die attach, or wirebond failure, the device will usually become non-functional. Passivation damage, however, has a more subtle effect in that the delicate chip metallisation tracks may be disturbed, causing failures early in the lifetime of the device. It can also lead to an acceleration of failures due to Al track corrosion mechanisms.

Moisture induced failures

Moisture can penetrate the encapsulant not only by permeation through the structure of the organic molecules, but also, perhaps more rapidly, through any pin-holes or cracks present in the resin coating. A frequent cause of failure is due to moisture penetration along a weakly bonded interface between encapsulant and die or substrate surface ^[18,19].

The effects of corrosion can be categorised into those involving chemical reactions (no electrical bias) and those where an electrochemical reaction takes place. An example of chemically induced corrosion occurs where there are large (>2%) concentrations of phosphorus in some die passivation layers (phosphosilicate glass) which react with any moisture present ^[18]. In this case, the effect of any applied circuit bias is of minor importance.

Since the glob-topped devices will probably be activated for most of their lifetime, electrochemical corrosion is likely to be the major cause of failure ^[20]. This corrosion takes the form of a breakdown of the passivating air formed oxide layer on the thin (1µm) Al track; impurity ions such as Na ⁺, K ⁺ and Cl ^- acting to accelerate the reaction.

Metallurgical factors

In addition to the galvanic couple effect referred to earlier, the effect of the different combinations of metals within a glob-topped device can be significant. Intermetallic phases formed during the thermosonic Au wirebonding process can break down due to the agglomeration of Kirkendall voids causing wirebond failure ^[21,22]. The presence of moisture and impurities, in the form of mobile ions (such as those from the halogen group) in the glob-top resin, can accelerate the break down process ^[23].

Environmental Factors

Radiation, in the form of α- particles, can cause changes in memory state ('soft errors') in dynamic random access memory (DRAM) devices, by penetrating the silicon and generating large numbers (in the region of 1.4x10 ⁶) of electron-hole pairs. A glob-top will provide a degree of protection against α- particles provided that it is inherently free from ionising radioactivity.

Performance requirements for glob-top materials

For an organic resin to be a suitable material for glob top applications, it must be capable of meeting several performance requirements. These fall into two main areas; material requirements and processing requirements.

Material requirements

If a glob-top resin is to gain acceptance as a viable material for protecting naked silicon chips in a chip on board or MCM application, a number of factors must be considered to ensure effective and reliable performance. These include the ability of the material to minimise the generation (or effects) of thermally induced stresses between glob top and die, substrate and wirebonds; protection of die and wirebonds from corrosion, and suitable electrical and thermal properties.

Minimisation of stresses

The effect of widely differing TCEs in the constituent components of a glob topped device can have a marked effect on device reliability or, in extreme cases, cause catastrophic failures. Ideally, therefore, the glob top material should have a TCE which closely approximates that of the board or substrate, die and wire bonds. Since silicon has a very low TCE (3.0-3.5x10 ^-6 °C ^-1) and substrate/boards typically have TCEs in the range 4.4x10 ^-6 °C ^-1 (AlN) to 15.8x10 ^-6 °C ^-1 (FR4), it is not possible to match the TCE of the glob top to both die and board or substrate. In any case, the inherent TCE of even a highly filled glob top resin will be at least a factor of 5 greater than the TCE of the die (see Table 1).

Table 1 Selected physical properties of glob-top materials (Source: Glob-top suppliers datasheets - typical values given)

Material type	Viscosity range	Shear strength psi [2]	Hardness (Shore)	Contaminants (ppm)			Tg °C	TCE, <Tg (ppm °C -1)	TCE, >Tg (ppm °C -1)
				Na +	K +	CL -
Epoxies (Filled)	Low to Thixotropic	1600-2500	90-98	10+	10+	20+	100-150	20-45	95-150
Modified Epoxies (Semi Flexible)	Low to Thixotropic	N/A	65	10+	10+	20+	50-60	N/A	N/A
UV Cured Epoxies	Low to Thixotropic	1400-3000	50-90	N/A	N/A	N/A	180	30	N/A
Silicones	Very low to low	Cohesive failures	30-35	5+	5+	5+	-80 to -60	Not Applicable	300-350
Polyimides	Low to medium	N/A	90-95	1	5	1	300	20-40	Not Applicable

Notes:
[1] N/A - information not readily available
[2] Depends on substrate. Polyimides often used in conjunction with adhesion promoter.
[3] Data on acrylate glob-top resins not currently available.

Since it is not possible to reduce thermally generated internal stresses to zero, the resin, therefore, must have a degree of flexibility in order to absorb excessive stresses. This can be achieved in some materials by operating them above their glass transition temperature (Tg) where they have a generally more compliant behaviour. However the TCE of the glob top materials generally increases above Tg thus potentially increasing stress generation.

Glob top materials which are very flexible may not afford sufficient mechanical protection to a component compared to a more rigid resin. This is especially true of silicone resins which are very soft and compliant in nature.

Protection of die and wirebonds from corrosion

Al tracks, bond pads and wirebonds are susceptible to moisture induced corrosion which is accelerated in the presence of aggressive mobile ions such as those in the halogen family. In order to reduce the rate of the corrosion therefore, the glob top material should have a low rate of moisture permeability, have a low mobile ion content and should have good adhesion to the die and board/substrate. In practice, this combination of properties is difficult to achieve as all organic resins are, to a greater or lesser extent, permeable to moisture.

Adhesion to die and board/substrate

For maximum protection of Al chip metallisation, the glob-top resin must remain in intimate contact with all parts of the die surface. A lack of adhesion, leading to delamination at the glob-top/chip interface, will allow a more direct moisture ingress path to the surface of the chip and hence accelerate the onset of corrosion.

Electrical properties

In order for a silicon device to function correctly, the glob-top material must have a minimum level of electrical insulation, depending on the nature of the component. It is obvious that devices handling small signal levels at low currents will be more affected due to lack of insulation, i.e. a higher level of electrical leakage across the chip, than those involved in high current applications. A closely associated factor is the electrical breakdown voltage of the glob top resin. In practice, the voltage levels found on a typical integrated circuit (1-20V) are insufficient to be a concern. However, the voltage levels encountered by glob-top protected power MOSFET devices (300-500V) could begin to approach the limit of some glob-top materials if the inter-electrode spacing is small.

Glob-top protected devices operating at low to medium switching speeds (up to the region of 100MHz) will largely be independent of the dielectric properties of the encapsulant. At higher frequencies, or where the wave form (i.e. harmonic structure) of the switched currents must be preserved, the dielectric properties of the material i.e. relative permittivity, ηr and loss factor, tan δ, become increasingly important. For minimum signal attenuation at high frequencies the glob-top material should have suitably low values of ηr and tan δ ^[24].

Thermal properties

Since the glob-top material is in direct contact with the chip surface, wirebonds and board/substrate, it has a potential to conduct heat away from the chip surface and wirebonds and transfer a proportion of it to the board/substrate, or radiate some of it into the environment. The addition of fillers, such as silica, to the glob-top resins generally have a beneficial effect on the thermal conductivity of these materials. An additional benefit is in a reduction of the TCE of the material.

Processing requirements

The processing of glob-top materials for semiconductor device protection involves successful mixing and storage, dispensing, curing and rework to achieve a reliable, cost-effective product.

Mixing and storage

An ideal glob-top material would be one that is supplied ready mixed and able to be stored at room temperature indefinitely, ready for use as required on the production line. In practice, these requirements cannot be met since all glob-top resins tend to cure to some extent at room temperature once mixed. Two-part materials are ideal if low temperature storage (typically -40°C) cannot be utilised. It is not unusual for 2-part glob-top materials to have a working (pot) life of only a few hours at room temperature once mixed. This also applies to materials that are supplied in a 'premixed and frozen' condition directly from the suppliers. However, some materials are now available that have extended pot lives at room temperature, coupled with conveniently short curing schedules.

The effect of premature curing of the glob-top resin is primarily that of an increase in viscosity which makes the dispensing of a measured amount of material difficult to control. The flow characteristics of the material during and post dispensing can also be affected adversely, even by a small degree of resin cure.

Dispense

The primary method of glob-top dispense is to use a pressure controlled syringe system. In this technique, a quantity of mixed glob-top resin is placed in a suitable syringe body. A metered quantity of material is applied to the semiconductor device and wirebonds, so that the latter are sufficiently covered. The quantity of resin dispensed in a given time period will depend on the viscosity of the material, diameter of the needle and applied pressure. Any variations in viscosity due to material mix variations, separation of constituents or significant degrees of room temperature curing, will make the dispensing process difficult to control.

A novel dispense process, made possible by the development of glob-top materials with suitable rheologies, involves the use of stencil printing. In this process it is possible to cover several semi-conductor devices (and associated wirebonds) on a board or substrate with glob-top resin. In practice, a stencil plate of controlled thickness, with apertures cut to suit the devices concerned, is placed onto the board/substrate and glob-top material applied by means of a 'squeegee' blade. The main advantage of this approach over syringe dispense methods is that several die can be coated simultaneously. The control over the glob-top profile can also be enhanced. The major disadvantage of the stencil printing approach is that it is limited to board/substrate assemblies where there are no other components mounted prior to the COB operations. Many COB assemblies have devices surface mounted prior to semi-conductor die attachment.

Cure

In order for the glob-top material to provide the necessary degree of protection against the environment, and physical stresses, it must be fully cured. This is conventionally achieved using the application of heat, usually in a temperature controlled oven. Typical curing schedules entail 1-4 hours duration at 150°C (much higher temperature in the case of polyimide resins).

Recently, UV light curing epoxy glob-top materials have become available which have the major processing advantages of short cure times (typically 2-3 minutes) and low (room) temperature curing. The latter avoids the common problem of having to subject polymer boards to curing temperatures that are above their glass transition temperatures (Tg), with the attendant risk of distortion and damage to wirebonds. The performance of these UV cured resins is not yet well characterised in terms of published data.

Rework

In the case of high value product, involving several glob-topped semiconductor devices on the same substrate, occasions will inevitably arise when one or more devices will need to be reworked. This usually involves heating the glob-topped device to soften the protective resin and die attach medium. It is thus desirable to use a low Tg thermosetting glob-top resin (and die attach adhesive), or use thermoplastic materials, where the board or substrate can be damaged by the application of excessive heat.

Experimental programme

This paper further describes a practical evaluation of a series of commercially available and new resins, using standard testing techniques.

Materials

Glob top resins

A range of glob top resins was evaluated to cover standard materials as well as the newer glob top resins capable of being stencil printed or UV cured:

Resin type	Supplier/Material	Status
Epoxy	Ablestik 933-1	Standard material
Epoxy	Ablestik 933-1.5	'Novel' stencil printable
Epoxy	Dexter FP4401	Modified epoxy
Epoxy	Dexter FP4323	Modified epoxy
Silicone	Dow Corning Q1-9239	Standard material (silicone)
Epoxy	Japan Rec NPR 100	'Novel' stencil printable
Epoxy	Electrolite ELC 2060AG	'Novel' UV curable

Substrates

Substrates were chosen to simulate typical COB surfaces that die would be mounted on. These were:

Au thick film over Al ₂O ₃
Glass dielectric over Al ₂O ₃
Epoxy solder resist over FR4 pcb

Mechanical and thermo-mechanical tests

Dispensing and flow characteristics

Each of the glob top resins, in turn, was dispensed onto an epoxy solder resist coated FR4 board, using either a pressurised syringe dispense system or, in the case of the stencil printable materials, a DEK 245 printer with a 1mm thick stainless steel stencil. The aim was to dispense the material in the form of a circle 10mm diameter, or 10mm square in the case of the stencil printing application. The ease of dispensing, in respect of: pressure required (syringe dispense), tendency to string, degree of flow and tendency towards thixotropic behaviour were all noted. The samples were then cured using the manufacturer's recommended cure schedule, and the relative amount of flow during cure also noted.

Lap Shear Tests

The full combination of the materials were lap shear tested using a sample configuration with an overlap area of 5x5mm (Fig.3).

The samples were prepared by dispensing sufficient glob top encapsulant to cover the area to be overlapped. The samples were then cured in accordance with the manufacturers' recommendations and shear tested. The fracture surfaces were examined visually to determine the failure mode, i.e. adhesive (failure at the adhesive/substrate interface), or cohesive (failure in the bulk of the adhesive).

Thermal cycling tests

A specially developed test vehicle was used for thermal cycling, consisting of wirebonded chains, in the form of a square, on either alumina or FR4 pcb substrates (Fig.4). In principle, the electrical continuity of the chains should remain intact if the thermo-mechanically induced stress levels are low. Conversely, high stress levels may cause movement in the wire loops, or lifting of the wirebonds from the substrate metallisation.

After wirebonding, the components were glob topped and cured. The electrical resistance of each wirebond chain was measured using a digital multimeter prior to thermal cycling, at 250 cycles and at the maximum of 500 cycles. Thermal cycling was carried out by cycling between -40°C, ambient temperature (25°C), 125°C, ambient temperature, -40°C and back to ambient. The rate of change of temperature was 5°C min ^-1 and the components were allowed to dwell at the minimum and maximum temperatures, and ambient temperature, for 15 minutes during each cycle.

Accelerated ageing test - temperature/humidity/bias (THB)

Selected resins were evaluated using the standard 85°C/85%RH temperature/humidity/bias test to gain information on their likely long term performance.

Test specimens based on the PMOS 3 test chip, in the form of a 2 chip x 2 chip array, were prepared.

The assembled PMOS 3 test samples (40 meander structures in total) were connected to the power supply unit and placed in an environmental damp heat chamber. The chamber was set to 85°C and then switched on. Once the set temperature had been reached, the humidity controller was set to 85%RH and switched on, to allow a gradual build-up of moisture in the chamber, i.e. to avoid a saturating condition. The bias voltage level was set to 15V and the track resistance and inter-track leakage limits set to 1.2k ohms and 100 microamps respectively. The bias voltage was then switched on and the status of the test samples monitored over a period of up to 1000 hours, the time of any change in sample condition, i.e. change in the colour of the LED from green to red, being noted. Once the test period had been completed, the humidity control of the chamber was turned off, followed 1 hour later by the heater control, and bias supply. Once the chamber had cooled down, the test specimens were removed for final electrical resistance and leakage testing, using the power supply unit. The samples were then examined to determine if there were any outwardly visible signs of the effects of the test conditions on the glob topped circuits.

Results summary - performance of glob top resins

1. Dispense and cure characteristics
   

   All the resins had acceptable/good dispensing characteristics. In particular, the new resins dispensed well, by either stencil printing, or syringe dispense.

   The stencil printable epoxy had similar cure sensitivity to the standard epoxy, and the UV curable epoxy showed some sensitivity to a 20sec change in cure time.

2. Mechanical behaviour

   The lap shear strengths obtained with (unmodified) epoxy materials were generally higher than for the silicone material evaluated. However, since the majority of the silicone joint failures were of a cohesive nature, a true picture of the relative adhesion of epoxies compared to silicones cannot be obtained.

   In thermal cycling tests, the conventional epoxy materials exhibited high failure rates in conjunction with ceramic test substrates due, it is thought, to the relatively large TCE differential between encapsulant and substrate, and the high moduli of the glob top resin. The silicone encapsulant showed improved results, perhaps due to its stress absorbing (low modulus) nature. However, in combination with standard FR4 boards, the conventional epoxy materials performed extremely well (no failures) whereas all but one sample of the silicone material failed. A possible explanation for these results is that the TCE values for filled epoxy encapsulants are reasonably close to that of FR4 board, in the X-Y plane (~30x10 ^-6 °C ^-1 compared to ~13x10 ^-6 °C ^-1).

3. Environmental protection

   The results of the steady humidity (THB) work confirmed the effectiveness of both the conventional unmodified epoxy and silicone resins evaluated. However, the UV cured epoxy and the stencil printable epoxy exhibited large numbers of failures, due to adhesion failure in the former case and, it is thought, due to the high levels of Cl ^- in the latter.

Conclusions

1. The selection of a glob-top material for a specific application is a complex process due to the large number of material properties that can influence the glob-top encapsulation process, electrical performance and reliability of the component.

   The properties include:

• supplied form (pre-mixed and frozen preferable)
• adequate pot/storage life
• ease of dispense (rheological characteristics)
• convenient cure schedule (compatible with low temperature boards)
• low void formation (low solvent content)
• good adhesion to a range of substrates
• low mobile ion content
• high moisture resistance
• good electrical properties at device operating frequencies
• adequate mechanical protection of die and wirebonds
• low stress generation within glob-topped device over required temperature range
• resistance to specific solvents

1. Test methods and conditions tend to be chosen by component purchasers and suppliers to suit a particular application, each company having its own test guidelines. There is a lack of standardised test specifications for glob-topped components, unlike the case of hermetic packaging (MIL STD 883) or moulded plastic packaging (JESD 22 + 26).
2. The work has confirmed conventional unmodified epoxy and silicone materials have good mechanical behaviour (strong adhesion to a range of surfaces) and good performance in thermal cycling tests when used with standard FR4 boards. Additionally, the conventional materials provide a high degree of protection against moisture-induced Al track corrosion.
3. The performance of the three novel glob top epoxy resins was mixed compared to industry standard epoxies. All had high lap shear strengths and good dispensing properties and the screen printable materials were good in thermal cycling when on FR4. The UV curable epoxy however, was poor in thermal cycling. Under THB testing, the stencil printable epoxies showed variable behaviour while the UV curable epoxy was average.

Acknowledgements

This paper is an abridged version of two reports funded by Industrial Members of TWI.

References

N°	Author	Title
1	Burkhart A:	'New epoxies for advanced surface mount applications', Proc Technical Programme in Surface Mount International Conf and Exposition San Jose, CA Aug 1991 285-294.
2	Bixby L A and Di Matteo D T:	'An alternative packaging technology', Hybrid Circuit Technology Dec 1990 9-13.
3	Wakamoto S:	'COB (Chip on Board) Technology', Sharp Corporation, IC Group. 'Guidelines for Chip-on-Board Technology', IPC Publication IPC-SM-784, Nov 1990.
4		Guidelines IPC.
5	Fujikawa O:	'Chip on Board' Institute for Interconnecting and Packaging Electronic Circuits (IPC) Fall Meeting Oct 24-28 Anheim, Ca.
6	Steinegger H:	'Smart Cards : Bonding Technology at its Limits', Microelectronic Manufacturing Technology Vol 14 No. 12 Dec 1991 13-15.
7	Stockham N R et al:	'Replacement of Solders by conductive Adhesives for Surface Mount Technology', TWI Report Number 5604/1/90.
8	Alfrey T and Gurnee E F:	'Organic Polymers', Publ Prentice-Hall Inc. New Jersey 1967.
9	Shinohara M:	'Encapsulants - An Overview' ASM Electronic Materials Handbook Pub ASM International 1989 802-809.
10	Iko K et al:	'Encapsulating resins for semiconductors', IEEE Electrical insulation magazine Vol 6, No 4, Jul/Aug 1990.
11	Uy M O and Benson R C:	'Package Sealing and Passivation Coatings', ASM Electronic Materials Handbook Vol 1 Pub. ASM International, Materials Park OH 1989, 240-241.
12	Licari J J and Hughes L A:	'Handbook of polymer coatings for electronics' Noyes Publications.
13		Private Communication with Mrs D Rudland of Ablestik Ltd.
14		Private Communication with Mr M Firmstone formerly representing Zeneca Ltd.
15		Private Communications with Mr P Burgess of Promatech Ltd.
16	Lambert R G:	'Low Cycle Fatigue Reliability Expressions' Proc Ann Reliability and Maintainability Symposium 1982 47.
17	Dunn C F and McPherson J W:	'Recent Observations on VLS, Bond Pad Corrosion Kinetics' J Electrochem Soc Vol 135 1988 661-667.
18	Golwalkar S and Samuelson G:	'Failure Mechanisms in Coated and Encapsulated Microelectronic Devices'. ASM Electronic Materials Handbook, Vol 1, 1049-1057.
19	Sinnadurai F N:	'Reliability of microelectronic (packaging & interconnection)', Electrochemical Publications Ltd, 1985 135-174.
20	Kolescar S C:	'Principles of Corrosion' Proc 12th Int Reliability Physics Symp. IEEE 1974, 155-160.
21	Chen, G K C:	'On the Physics of Purple-Plague Formation and the Observation of Purple Plague in Ultrasonically-Joined Gold-Aluminium Bonds', IEEE Trans. Parts Materials and Packaging, Vol 3 (4), December 1967.
22	Harman, G G:	'Wirebonding in Microelectronics', pub ISHM 1989, 62-64.
23	Paulson W M and Lorigan R P:	'The effect of Impurities on the Corrosion of Aluminium Metallisation'. Proc. 14th IEEE International Reliability Physics Symposium, 1976, 42.
24	Mumby, S J and Swarzkopf, D A:	'Dielectric Properties and High Speed Electrical Performance Issues', ASM Electronic Materials Handbook, Vol 1, 596-610.